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Search results 1-15 of 15.

Friday, August 11th 2017, 2:53am

Author: jmag999

STM32F746 External QSPI Programming with J-Flash

Wow, it worked through GDB in Atollic. Awesome! I didn't have to do anything additional to get this to work besides adding the lines to the xml file and copying the elf file to the segger driver install directory.

Friday, August 11th 2017, 2:26am

Author: jmag999

STM32F746 External QSPI Programming with J-Flash

It looks like the Discovery board J-link does not work with J-Flash (even though I have another J-link that does have a license). Is there any other way to get this programmed without switching the on-board debugger back to a st-link?

Friday, August 11th 2017, 2:21am

Author: jmag999

STM32F746 External QSPI Programming with J-Flash

I figured it out. I had to go in and re-select the MCU. Then it showed the 1MB + 32MB banks. I figured just re-opening j-flash after editing the xml file would update the project but this is not the case.

Friday, August 11th 2017, 2:17am

Author: jmag999

STM32F746 External QSPI Programming with J-Flash

I am trying to get this working in j-flash. I edited JLinkDevices.xml in the C:\Program Files (x86)\SEGGER\JLink_V618 directory. I added the following to the file: <Device> <ChipInfo Vendor="ST" Name="STM32F746NG" Core="JLINK_CORE_CORTEX_M7" /> <FlashBankInfo Name="QSPI Flash" BaseAddr="0x90000000" MaxSize="0x01000000" Loader="ST_STM32F746G_Disco_QSPI.elf" LoaderType="FLASH_ALGO_TYPE_OPEN" /> </Device> I also copied the ST_STM32F746G_Disco_QSPI.elf to the same directory. When I open my j-flash p...

Thursday, May 25th 2017, 8:02pm

Author: jmag999

Linker Issue with 2nd Memory Region

Got this figured out, needed the "." in front of the section name in the variable declaration. This was not required when using Atollic/GCC.

Wednesday, May 24th 2017, 9:30pm

Author: jmag999

Linker Issue with 2nd Memory Region

I am trying to use the second ram region in an STM32L476. I have this in the placement file: <MemorySegment name="$(RAM2_NAME:RAM2)" > <ProgramSection alignment="4" load="No" name=".OS_HEAP" /> <ProgramSection alignment="4" load="No" name=".bss2" /> </MemorySegment> And this in the memory map file: <MemorySegment name="RAM2" start="0x10000000" size="0x07FFF" access="Read/Write" /> And this in my code: static __attribute__((section("OS_HEAP"))) uint8_t ucHeap[ 32768 ]; But I get this error: Proje...

Friday, March 4th 2016, 8:29pm

Author: jmag999

[SOLVED] / [ABANDONED] J-Link V5.10d Internal Error while trying to start debug session

We are having the same problem. Other debuggers work fine. This just started happening a few days ago with IAR. 2 Developers have the problem. 1 other developers JLink is working fine.

Friday, January 8th 2016, 6:54pm

Author: jmag999

[SOLVED] STM32 F7 Factory Reset

Thanks. Any idea where I can find the unlock info? I searched for unlock in the datasheet and referenece manual, but came up short.

Thursday, January 7th 2016, 12:50pm

Author: jmag999

[SOLVED] STM32 F7 Factory Reset

I have a board with an STM32F746 that was working fine with my JLINK. I used the STM32 Unlock tool, and selected the F4 family (since there is no F7), and now when I try to debug in IAR, I get an error message "Execution failure in flash loader". No settings have changed since it was working, so I know the flash loader is good (it's the default in IAR 7.50). Any ideas?

Friday, June 26th 2015, 6:12pm

Author: jmag999

IAR Won't Update To V500

I have been trying to update (for new part support) to version 5 of the jlink driver. I check the box to update at the end of the jlink installation, but when I run IAR, it's still on 4.82. I have also tried running as administrator and even manually copying over the files. Any idea what could be wrong? I am running IAR 7.40.3 (and also tried on 7.40.2).

Thursday, January 29th 2015, 5:52pm

Author: jmag999

Verify Target RAM using J-Link

Thanks, are there any example scripts available to demonstrate how to do this in JLink Commander?

Thursday, January 29th 2015, 2:08pm

Author: jmag999

Verify Target RAM using J-Link

Is it possible to do a RAM verification test using the J-Link outside of an IDE (or using IAR)? The target processor is a Freescale Kinetis K60

Thursday, August 14th 2014, 5:55pm

Author: jmag999

NRF51822 GDB Debugging Problem

Yes, it's working properly now. A more descriptive error would have been great though. Something like "Could not write to section 0x14000." It does say this somewhere in the log, but continues to run until it gets to "Starting target processor".

Thursday, August 14th 2014, 2:19pm

Author: jmag999

NRF51822 GDB Debugging Problem

Turns out that the template I was using for a non-makefile eclipse project had an error with the linker for the latest softdevice. The J-link was prevented from overwriting an area of the code where the softdevice was placed and this prevented debugging.

Wednesday, August 13th 2014, 1:41pm

Author: jmag999

NRF51822 GDB Debugging Problem

I have tried both the Nordic App Note settings and using the GDB J-Link Eclipse plugin, but the debug session hangs at "Starting debugging...". It does make a connection to the GDB server. I am trying to debug the dev kit PCA10001 board with a built-in JLINK. Attached is my debug log. Any idea what could be wrong?