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esvrs

Beginner

Date of registration: Sep 18th 2017

Posts: 2

1

Wednesday, September 20th 2017, 3:37pm

[ABANDONED] Errors with J-Link EDU and custom CC2650 board (IAR Embedded Workbench)

Hello,

I am working with a custom built board using the TI CC2650 SoC for my bachelor thesis and currently try to debug the firmware (based on TI-RTOS) using J-Link EDU V10.1 with IAR Embedded Workbench 8.10.1. Previously we worked with the TI XDS100v3 debugger wich mostly worked out but now, using the J-Link EDU, different errors occur while downloading and debugging the firmware.
They occur kind of randomly and it's not always the same error. Also, sometimes after power cycling the debugger and the board or after waiting a couple of time before restarting the debugging session, it will work out, only to fail again on the next attempt.

This are the different errors:

1.
Fatal error: Device specific connect: Can not find CPU TAP (IDCODE mismatch)

2.
Communication timed out: Requested 2 bytes, received 0 bytes !
Could not transfer JTAG data.
Device specific connect: Can not find CPU TAP (IDCODE mismatch)

3.
Communication timed out !
Could not read speed info.
Could not transfer JTAG data.
Device specific connect: Can not find CPU TAP (IDCODE mismatch)

4.
Communication timed out: Requested 8 bytes, received 0 bytes !
Bad JTAG communication: Write to IR: Expected 0x1, got 0x0 (TAP Command:10) @ Off 0x5.

5.
Communication timed out !
Could not transfer JTAG data.

6.
Communication timed out !
Could not transfer JTAG data.
Device specific connect: Can not find CPU TAP (IDCODE mismatch)


Here are some more detailled debug logs:

Example for 4:
https://pastebin.com/Ve6AGjZm

Example for 5:
https://pastebin.com/2VFMySaf

Example for 6:
https://pastebin.com/6KLPXCaM

Working example:
https://pastebin.com/SK7UYV1d

What could be the reason for these errors? It seems to be a failure in the JTAG connection and/or the reset of the device.
I think the signal connections are all correct and the settings in IAR too.

Thank you for any help and have a nice day,
Enno Sievers

SEGGER - Niklas

Super Moderator

Date of registration: Oct 6th 2014

Posts: 1,684

2

Wednesday, September 20th 2017, 3:59pm

Hi Enno,

are you using an eval board or custom hardware?
On some Ti eval boards, the onboard debug probe needs to separated from the target MCU in order to prevent it from interfering with the debug signals.
Example:
https://wiki.segger.com/CC1310_LaunchPad

Best regards,
Niklas
Would you like to be added to the J-Link software update notification list, so you get informed automatically when a new version becomes available?
Just write me a PM or in case you want to subscribe to it yourself, please use this link: Link
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esvrs

Beginner

Date of registration: Sep 18th 2017

Posts: 2

3

Wednesday, September 20th 2017, 4:33pm

I am using custom hardware

SEGGER - Niklas

Super Moderator

Date of registration: Oct 6th 2014

Posts: 1,684

4

Friday, September 29th 2017, 4:31pm

Hi,


I just gave it a try on an evaluation board and could not reproduce any issues.
Is this issue reproduce able on an evaluation board?

Can you provide us with a reproduction scenario for J-Link Commander?

Best regards,
Niklas
Would you like to be added to the J-Link software update notification list, so you get informed automatically when a new version becomes available?
Just write me a PM or in case you want to subscribe to it yourself, please use this link: Link
Notification for J-Link, J-Link Debugger, SystemView & J-Scope: Link
Notification for Embedded Studio: Link