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ulrik

Beginner

Date of registration: Jun 12th 2017

Posts: 11

1

Monday, February 5th 2018, 4:45pm

[SOLVED] JTAG problem, NXP iMX7Solo

Hi,

Problem with a custom board containing an NXP iMX7Solo (MCIMX7S3EVK08SC). Mostly a copy between iMX7Dual dev.kit. and the Warp7 dev.kit.

Using j-link commander to connect to cortex-A7, no script. Clocked at only 1 kHz (tried 100 kHz and 4 MHz as well).

Output in commander:


J-Link>connect
Device "CORTEX-A7" selected.


TotalIRLen = 4, IRPrint = 0x01
ARM AP[0]: 0x64770001, AHB-AP
ARM AP[1]: 0x44770002, APB-AP
ROMTbl 0 [0]: 00040003, CID: B105100D, PID:00-00080000 ROM Table
ROMTbl 1 [0]: 00001003, CID: B105900D, PID:04-002BB908 CSTF
ROMTbl 1 [1]: 00020003, CID: B105100D, PID:04-000BB4A7 ROM Table
ROMTbl 2 [0]: 00010003, CID: B105900D, PID:04-005BBC07 Cortex-A7
Found Cortex-A7 r0p5
6 code breakpoints, 4 data breakpoints
Debug architecture ARMv7.1
TotalIRLen = 4, IRPrint = 0x01

****** Error: Cortex-A/R (connect): Failed to temporarily halting CPU for reading CP15 registers.
TotalIRLen = 4, IRPrint = 0x01
TotalIRLen = 4, IRPrint = 0x01
Cannot connect to target.
J-Link>




Log file j-link control panel:


T17C8 074:295 JLINK_ConfigJTAG(IRPre = -1, DRPre = -1) (0000ms, 25632ms total)
T17C8 074:295 JLINK_ExecCommand("device=CORTEX-A7", ...). Device "CORTEX-A7" selected. returns 0x00 (0001ms, 25633ms total)
T17C8 074:296 JLINK_SetSpeed(1) (0000ms, 25633ms total)
T17C8 074:296 JLINK_EnableLog(...) (0000ms, 25633ms total)
T17C8 074:296 JLINK_GetEmuCaps() returns 0xB9FF7BBF (0000ms, 25633ms total)
T17C8 074:296 JLINK_TIF_GetAvailable(...) (0001ms, 25634ms total)
T17C8 074:297 JLINK_TIF_Select(JLINKARM_TIF_JTAG) returns 0x00 (0000ms, 25634ms total)
T17C8 074:297 JLINK_Connect() >0x2F8 JTAG>TotalIRLen = 4, IRPrint = 0x01 >0x30 JTAG> >0x410 JTAG> >0x30 JTAG> >0x40 JTAG> >0x30 JTAG> >0x30 JTAG> >0x40 JTAG> >0x40 JTAG> >0x40 JTAG>ARM AP[0]: 0x64770001, AHB-AP >0x40 JTAG> >0x40 JTAG> >0x40 JTAG>ARM AP[1]: 0x44770002, APB-AP >0x78 JTAG> >0x40 JTAG> >0x40 JTAG> >0x40 JTAG> >0x40 JTAG> >0x30 JTAG> >0x30 JTAG> >0x30 JTAG> >0x30 JTAG> >0x30 JTAG> >0x30 JTAG> >0x40 JTAG> >0x40 JTAG> >0x30 JTAG> >0x30 JTAG> >0x40 JTAG> >0x40 JTAG> >0x40 JTAG> >0x30 JTAG>
>0x30 JTAG> >0x30 JTAG> >0x30 JTAG> >0x30 JTAG> >0x30 JTAG> >0x40 JTAG> >0x40 JTAG> >0x30 JTAG> >0x30 JTAG> >0x30 JTAG> >0x30 JTAG> >0x30 JTAG> >0x30 JTAG> >0x30 JTAG> >0x30 JTAG> >0x30 JTAG> >0x30 JTAG>ROMTbl 0 [0]: 00040003, CID: B105100D, PID:00-00080000 ROM Table >0x40 JTAG> >0x40 JTAG> >0x30 JTAG> >0x30 JTAG> >0x30 JTAG> >0x30 JTAG> >0x30 JTAG> >0x30 JTAG> >0x40 JTAG> >0x40 JTAG> >0x30 JTAG> >0x30 JTAG> >0x40 JTAG> >0x40 JTAG> >0x40 JTAG> >0x30 JTAG> >0x30 JTAG> >0x30 JTAG> >0x30 JTAG> >0x30 JTAG>
>0x30 JTAG> >0x40 JTAG> >0x40 JTAG> >0x30 JTAG> >0x30 JTAG> >0x30 JTAG> >0x30 JTAG> >0x30 JTAG> >0x30 JTAG> >0x30 JTAG> >0x30 JTAG> >0x30 JTAG> >0x30 JTAG>ROMTbl 1 [0]: 00001003, CID: B105900D, PID:04-002BB908 CSTF >0x40 JTAG> >0x40 JTAG> >0x30 JTAG> >0x30 JTAG> >0x40 JTAG> >0x40 JTAG> >0x40 JTAG> >0x30 JTAG> >0x30 JTAG> >0x30 JTAG> >0x30 JTAG> >0x30 JTAG> >0x30 JTAG> >0x40 JTAG> >0x40 JTAG> >0x30 JTAG> >0x30 JTAG> >0x30 JTAG> >0x30 JTAG> >0x30 JTAG> >0x30 JTAG> >0x30 JTAG> >0x30 JTAG> >0x30 JTAG>
>0x30 JTAG>ROMTbl 1 [1]: 00020003, CID: B105100D, PID:04-000BB4A7 ROM Table >0x40 JTAG> >0x40 JTAG> >0x30 JTAG> >0x30 JTAG> >0x30 JTAG> >0x30 JTAG> >0x30 JTAG> >0x30 JTAG> >0x40 JTAG> >0x40 JTAG> >0x30 JTAG> >0x30 JTAG> >0x40 JTAG> >0x40 JTAG> >0x40 JTAG> >0x30 JTAG> >0x30 JTAG> >0x30 JTAG> >0x30 JTAG> >0x30 JTAG> >0x30 JTAG> >0x40 JTAG> >0x40 JTAG> >0x30 JTAG> >0x30 JTAG> >0x30 JTAG> >0x30 JTAG> >0x30 JTAG> >0x30 JTAG> >0x30 JTAG> >0x30 JTAG> >0x30 JTAG> >0x30 JTAG>
ROMTbl 2 [0]: 00010003, CID: B105900D, PID:04-005BBC07 Cortex-A7 >0x40 JTAG> >0x40 JTAG> >0x30 JTAG> >0x30 JTAG> >0x40 JTAG>Found Cortex-A7 r0p56 code breakpoints, 4 data breakpointsDebug architecture ARMv7.1 >0x40 JTAG> >0x40 JTAG> >0x30 JTAG> >0x30 JTAG> >0x30 JTAG> >0x40 JTAG> >0x30 JTAG> >0x78 JTAG> >0x40 JTAG> >0x30 JTAG> >0x30 JTAG> >0x40 JTAG> >0x40 JTAG> >0x40 JTAG> >0x30 JTAG> >0x30 JTAG> >0x30 JTAG> >0x40 JTAG> >0x30 JTAG> >0x78 JTAG> >0x40 JTAG> >0x30 JTAG> >0x30 JTAG> >0x40 JTAG> >0x40 JTAG>
>0x40 JTAG> >0x30 JTAG> >0x30 JTAG> >0x40 JTAG> >0x40 JTAG> >0x40 JTAG> >0x30 JTAG> >0x30 JTAG> >0x30 JTAG> >0x40 JTAG> >0x30 JTAG> >0x78 JTAG> >0x40 JTAG> >0x30 JTAG> >0x30 JTAG> >0x40 JTAG> >0x40 JTAG> >0x40 JTAG> >0x30 JTAG> >0x40 JTAG> >0x40 JTAG> >0x30 JTAG> >0x30 JTAG> >0x40 JTAG> >0x40 JTAG> >0x30 JTAG> >0x40 JTAG> >0x40 JTAG> >0x40 JTAG> >0x40 JTAG> >0x30 JTAG> >0x40 JTAG> >0x40 JTAG> >0x30 JTAG> >0x30 JTAG> >0x30 JTAG> >0x30 JTAG> >0x30 JTAG> >0x30 JTAG> >0x30 JTAG> >0x30 JTAG> >0x30 JTAG>
>0x30 JTAG> >0x30 JTAG> >0x30 JTAG> >0x30 JTAG> >0x30 JTAG> >0x30 JTAG> >0x30 JTAG> >0x30 JTAG> >0x30 JTAG> >0x30 JTAG> >0x30 JTAG> >0x30 JTAG> >0x30 JTAG> >0x30 JTAG> >0x30 JTAG> >0x30 JTAG> >0x30 JTAG> >0x30 JTAG> >0x30 JTAG> >0x30 JTAG> >0x30 JTAG> >0x30 JTAG> >0x30 JTAG> >0x30 JTAG> >0x30 JTAG> >0x30 JTAG> >0x30 JTAG> >0x30 JTAG> >0x30 JTAG> >0x30 JTAG> >0x30 JTAG> >0x30 JTAG> >0x30 JTAG> >0x30 JTAG> >0x30 JTAG> >0x30 JTAG> >0x30 JTAG> >0x30 JTAG> >0x30 JTAG> >0x30 JTAG> >0x30 JTAG> >0x30 JTAG>
>0x30 JTAG> >0x30 JTAG> >0x30 JTAG> >0x30 JTAG> >0x30 JTAG> >0x30 JTAG> >0x30 JTAG> >0x30 JTAG> >0x30 JTAG> >0x30 JTAG>
***** Error: Cortex-A/R (connect): Failed to temporarily halting CPU for reading CP15 registers. >0x2F8 JTAG>TotalIRLen = 4, IRPrint = 0x01 >0x30 JTAG> >0x410 JTAG> returns 0xFFFFFEFB (17987ms, 43621ms total)
T17C8 092:285 JLINK_GetIdData(...) >0x2F8 JTAG>TotalIRLen = 4, IRPrint = 0x01 >0x30 JTAG> >0x410 JTAG> >0x2F8 JTAG>TotalIRLen = 4, IRPrint = 0x01 >0x30 JTAG> >0x410 JTAG> (3785ms, 47406ms total)

SEGGER - Nino

Super Moderator

Date of registration: Jan 2nd 2017

Posts: 699

2

Thursday, February 8th 2018, 11:53am

Hello,

Thank you for your inquiry.
Such an issue is not known to us.
For reference could you provide a screenshot of the full commander output following the following steps? https://wiki.segger.com/J-Link_cannot_co…-Link_Commander

Attached is the output from a successful connect on one of our eval boards with a PCIMX7S5EVM08SA MCU.

Best regards,
Nino
SEGGER - Nino has attached the following image:
  • Capture.PNG

ulrik

Beginner

Date of registration: Jun 12th 2017

Posts: 11

3

Monday, February 12th 2018, 11:01am

Hi,

New board which has never run code.


SEGGER - Nino

Super Moderator

Date of registration: Jan 2nd 2017

Posts: 699

4

Monday, February 12th 2018, 2:01pm

Hello,

From the screenshot you provided the VTref value seems very low with only 1.8 V.
Make sure the target device is fully powered when trying to connect to it. Some other "low power" modes might turn on the MCU but full debug features are not always enabled then.
Could you check your target power delivery and check if the 1.8 V are expected?

Best regards,
Nino

ulrik

Beginner

Date of registration: Jun 12th 2017

Posts: 11

5

Monday, February 12th 2018, 5:17pm

Hi, yes 1.8 V is the designed voltage. I cannot see in the datasheet any supply voltages that should not work at this level.

ulrik

Beginner

Date of registration: Jun 12th 2017

Posts: 11

6

Tuesday, February 13th 2018, 9:13am

I believe the dev. kit. WaRP7 is using 1.8 V as well, but unfortunally I haven't been able to order it.

ulrik

Beginner

Date of registration: Jun 12th 2017

Posts: 11

7

Tuesday, February 13th 2018, 10:29am

Hi Nino,

After half a year with problem solving this issue, I finally got it working. The "entire" system runs at 1.8 V, except the USB_OTG and NVCC_SD1. They have 3.3 V, which was not powered, and that seems to be a problem for the jtag chain to work.

Thanks to Segger for helping out with valuable suggestions and generel support :thumbup: - in the absense of that service from NXP.

SEGGER - Nino

Super Moderator

Date of registration: Jan 2nd 2017

Posts: 699

8

Tuesday, February 13th 2018, 10:36am

Hi,

Great to hear that you are up and running again.
We will consider this case as closed now.

Best regards,
Nino