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Piet

Beginner

Date of registration: Oct 31st 2008

Posts: 2

1

Friday, October 31st 2008, 2:16pm

Fatal error: Can not read register 9 (R15 (PC)), CPU may not be halted

I have downloaded and installed the latest J-Link software (V3.94) but for some reason it is not possible to debug because of the following error:

Fri Oct 31 13:46:33 2008: Fatal error: Can not read register 9 (R15 (PC)), CPU may not be halted
I am working with the IAR Embedded workbench IDE 5.0 in combination with the microcontroller LPC2468 from NXP

Prior to this error a image is loaded into flash through J-Link. The image has been loaded correctly into flash because if I power cycle the target everything works OK.

Can anyone help with this error ??

Thanks Piet

Hereunder is the complete debug log

Fri Oct 31 14:07:47 2008: Loaded macro file: C:\Program Files\IAR Systems\Embedded Workbench 5.0\ARM\config\flashloader\NXP\FlashNXPLPC512k2.mac
Fri Oct 31 14:07:49 2008: DLL version: V3.94
Fri Oct 31 14:07:49 2008: Firmware: J-Link ARM V6 compiled Oct 15 2008 10:48:36
Fri Oct 31 14:07:49 2008: JTAG speed is initially set to: 32 kHz
Fri Oct 31 14:07:49 2008: TotalIRLen = 4, IRPrint = 0x01
Fri Oct 31 14:07:50 2008: RESET has cleared breakpoint, using default reset strategy.
Fri Oct 31 14:07:50 2008: Resetting target using RESET pin
Fri Oct 31 14:07:50 2008: Hardware reset with strategy 1 was performed
Fri Oct 31 14:07:50 2008: Initial reset was performed
Fri Oct 31 14:07:50 2008: J-Link found 1 JTAG device. ARM core Id: 4F1F0F0F
Fri Oct 31 14:07:50 2008: Device at TAP0 selected
Fri Oct 31 14:07:50 2008: JLINK command: map ram 0x40000000-0x40003fff; map indirectread - FAILED
Fri Oct 31 14:07:51 2008: RTCK reaction time is approx. 315ns
Fri Oct 31 14:07:51 2008: Auto JTAG speed: Adaptive
Fri Oct 31 14:07:52 2008: 9604 bytes downloaded and verified (8.83 Kbytes/sec)
Fri Oct 31 14:07:52 2008: Loaded debugee: C:\Program Files\IAR Systems\Embedded Workbench 5.0\ARM\config\flashloader\NXP\FlashNXPLPC512k2.out
Fri Oct 31 14:07:52 2008: Target reset
Fri Oct 31 14:08:46 2008: Program exit reached.
Fri Oct 31 14:08:47 2008: TotalIRLen = 4, IRPrint = 0x01
Fri Oct 31 14:08:47 2008: RESET has cleared breakpoint, using default reset strategy.
Fri Oct 31 14:08:47 2008: Hardware reset with strategy 1 was performed
Fri Oct 31 14:09:04 2008: Fatal error: Can not read register 9 (R15 (PC)), CPU may not be halted

SEGGER - Rolf

Super Moderator

Date of registration: Nov 21st 2007

Posts: 65

2

Saturday, November 1st 2008, 3:46pm

Piet,

it seems the problem is that the reset after download of the flash loader does not work right.
Can you send the content of the flash memory or (even better) the IAR project which has
caused this to support@segger.com ?

Also: Which board are you using ?
We would like to investigate what is going on.

BTW: As a work-around, you should be able to use NXPs flash magic tool. Since it puts the CPU in
a bootloader mode, it should be possible to erase the flash and continue to work with IAR EWARM.

Best regards,
Rolf

Piet

Beginner

Date of registration: Oct 31st 2008

Posts: 2

3

Monday, November 3rd 2008, 10:54am

Rolf,

We modified the delay from 0 ms to 50 ms of the reset "Hardware, halt after delay (ms)" in "Options - Debugger - J-Link/J-Trace" in the setup tab and now everything works OK. Probably this delay now gives enough time for the low-level setup of our application.

Piet